Difference between revisions of "Peripheral 2 Register"
From SpecNext official Wiki
(core 3.0 changes) |
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| 6 || DMA mode (0 = zxnDMA, 1 = Z80 DMA) (0 after PoR or Hard-reset) | | 6 || DMA mode (0 = zxnDMA, 1 = Z80 DMA) (0 after PoR or Hard-reset) | ||
|- | |- | ||
| − | | 5 || Enable Lightpen (1 = enabled) (0 after PoR or Hard-reset) | + | | 5 || (core 2.0) Enable Lightpen (1 = enabled) (0 after PoR or Hard-reset) |
| + | (core 3.0) Enable "F3" key (50/60 Hz switch) | ||
|- | |- | ||
| 4 || DivMMC automatic paging (1 = enabled) (0 after PoR or Hard-reset) | | 4 || DivMMC automatic paging (1 = enabled) (0 after PoR or Hard-reset) | ||
| Line 19: | Line 20: | ||
|- | |- | ||
| 2 || PS/2 mode (0 = keyboard, 1 = mouse), exchanges the keyboard/mouse pins on the PS/2 connector (0 after PoR or Hard-reset) | | 2 || PS/2 mode (0 = keyboard, 1 = mouse), exchanges the keyboard/mouse pins on the PS/2 connector (0 after PoR or Hard-reset) | ||
| + | (core 3.0) can be modified only in "config" mode | ||
|- | |- | ||
| 1-0 || Audio chip mode (%00 = YM, %01 = AY, %1x = Disabled) | | 1-0 || Audio chip mode (%00 = YM, %01 = AY, %1x = Disabled) | ||
| + | (core 3.0) %11 resets all AY (not sure how is that different from %10, TBD) | ||
|} | |} | ||
The bit 7 doesn't prevent SW from setting up turbo mode by writing into {{NextRegNo|$07}}, it is used only to enable/disable the "F8" key toggle (core 2.00.24 information). | The bit 7 doesn't prevent SW from setting up turbo mode by writing into {{NextRegNo|$07}}, it is used only to enable/disable the "F8" key toggle (core 2.00.24 information). | ||
| + | |||
| + | '''NEW in core 3.0:''' | ||
| + | |||
| + | bit 5 = enable F3 (50/60 Hz) | ||
| + | bit 2 ps2mode only modifiable in config mode | ||
| + | chip mode = 11 resets all AY | ||
Revision as of 15:11, 4 October 2019
| Number | $06 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Enables Acceleration, Lightpen, DivMMC, Multiface, Mouse and AY audio. |
| Bit | Function |
|---|---|
| 7 | Enable turbo mode key "F8", 0 = disabled (0 after PoR or Hard-reset) |
| 6 | DMA mode (0 = zxnDMA, 1 = Z80 DMA) (0 after PoR or Hard-reset) |
| 5 | (core 2.0) Enable Lightpen (1 = enabled) (0 after PoR or Hard-reset)
(core 3.0) Enable "F3" key (50/60 Hz switch) |
| 4 | DivMMC automatic paging (1 = enabled) (0 after PoR or Hard-reset) |
| 3 | Enable Multiface (1 = enabled) (0 after PoR or Hard-reset) |
| 2 | PS/2 mode (0 = keyboard, 1 = mouse), exchanges the keyboard/mouse pins on the PS/2 connector (0 after PoR or Hard-reset)
(core 3.0) can be modified only in "config" mode |
| 1-0 | Audio chip mode (%00 = YM, %01 = AY, %1x = Disabled)
(core 3.0) %11 resets all AY (not sure how is that different from %10, TBD) |
The bit 7 doesn't prevent SW from setting up turbo mode by writing into CPU Speed Register ($07), it is used only to enable/disable the "F8" key toggle (core 2.00.24 information).
NEW in core 3.0:
bit 5 = enable F3 (50/60 Hz) bit 2 ps2mode only modifiable in config mode chip mode = 11 resets all AY