Difference between revisions of "Tilemap"

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(testing new NextRegNo template second argument to display decimal form inside the parentheses next to the hexa)
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             (if either are transparent the result is transparent otherwise the
 
             (if either are transparent the result is transparent otherwise the
 
             result is a logical AND of both colours)
 
             result is a logical AND of both colours)
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=== More info ===
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[https://www.specnext.com/tilemap-mode/ Article about Tilemap Mode]

Revision as of 00:54, 19 September 2020

Tilemap

A screen mode similar to hardware text linked to the ULA modes which allows for either 40x32 or 80x32 16-colour 8x8 tiles.

The tilemap is enabled using Tilemap Control Register ($6B / 107)

 bit 7: 0=disable tilemap, 1=enable tilemap
 bit 6: 0=40x32, 1=80x32
 bit 5: 0=attributes in tilemap, 1=no attributes in tilemap
 bit 4: 0=primary palette, 1=secondary palette
 bits 3-2: reserved (0)
 bit 1: 0=256 tile mode, 1=512 tile mode
 bit 0: 1=tilemap over ULA

The tilemap consists of two data areas: tile descriptions and an actual tilemap; both of which are located in 16k page 5

Tile Description

The tile description area is a contiguous list of tile descriptions starting at the location indicated by bits 5-0 of the value in Tile Definitions Base Address Register ($6F / 111).

Each tile description is a 32 byte block of 4-bit values describing the indices of each pixel of a tile in row major order.

Tilemap

The tilemap begins at the location stored in bits 5-0 of Tilemap Base Address Register ($6E / 110).

This map either consists of either pairs of tile numbers and tile attributes, or a list of tile numbers. If no attributes are present (bit 5 of Nextreg $6B=1) then the attributes for all tiles come from Default Tilemap Attribute Register ($6C / 108).

Tile Attribute

 bits 7-4: palette offset
 bit 3: mirror X
 bit 2: mirror Y
 bit 1: Rotate
 bit 0: In 256-tile mode ULA over tilemap, in 512-tile mode bit 8 of tile number

Additional Registers

Clip Window Tilemap Register ($1B / 27)

 bits 7-0: Coord. of the clip window
 1st write = X1 position
 2nd write = X2 position
 3rd write = Y1 position
 4rd write = Y2 position
 The values are 0,159,0,255 after a Reset
 Reads do not advance the clip position

Tilemap Offset X MSB Register ($2F / 47)

 bits 7-2: Reserved (0)
 bits 1-0: MSB X Offset
 Meaningful Range is 0-319 in 40 char mode, 0-639 in 80 char mode

Tilemap Offset X LSB Register ($30 / 48)

 bits 7-0: LSB X Offset
 Meaningful range is 0-319 in 40 char mode, 0-639 in 80 char mode

Tilemap Offset Y Register ($31 / 49)

 bits 7-0: Y Offset (0-255)

Enhanced ULA Control Register ($43 / 67)

 bit 7: '1' to disable palette write auto-increment.
 bits 6-4: Select palette for reading or writing:
    000 = ULA first palette
    100 = ULA second palette
    001 = Layer 2 first palette
    101 = Layer 2 second palette
    010 = Sprites first palette 
    110 = Sprites second palette
    011 = Tilemap first palette
    111 = Tilemap second palette
 bit 3: Select Sprites palette (0 = first palette, 1 = second palette)
 bit 2: Select Layer 2 palette (0 = first palette, 1 = second palette)
 bit 1: Select ULA palette (0 = first palette, 1 = second palette)
 bit 0: Enable Enhanced ULA mode if 1 (0 after a reset)

ULA Control Register ($68 / 104)

 bit 7: 1 to disable ULA output
 bit 6: 0=select the ULA colour for blending in SLU modes 6 & 7
        1=select the ULA/tilemap mix for blending in SLU modes 6 & 7
 bits 5-1: Reserved (0)
 bit 0: 1=enable stencil mode when both the ULA and tilemap are enabled
           (if either are transparent the result is transparent otherwise the
            result is a logical AND of both colours)

More info

Article about Tilemap Mode