Difference between revisions of "Circuit Diagrams"
From SpecNext official Wiki
| Line 20: | Line 20: | ||
{| width=100% | {| width=100% | ||
| − | |valign=top width=50%| [[Image: | + | |valign=top width=50%| [[Image:Expansion_bus_location.jpg|461px]] |
|valign=top| [[Image:Expansion_bus.png|461px]] | |valign=top| [[Image:Expansion_bus.png|461px]] | ||
|} | |} | ||
Revision as of 13:52, 14 April 2019
Contents
J13 - Daughter board connector
|
|
J15 - Next GPIO
|
|
CN5 - Expansion bus (edge connector)
|
|
J10/J11 - Memory Expansion Ports
|
|