Circuit Diagrams: Difference between revisions

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== CN6/CN8 - Memory Expansion Ports ==
== J10/J11 - Memory Expansion Ports ==


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Revision as of 13:38, 14 April 2019

J13 - Daughter board connector


J15 - Next GPIO


CN5 - Expansion bus (edge connector)


J10/J11 - Memory Expansion Ports