Difference between revisions of "Core Version Register"
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|Readable=Yes | |Readable=Yes | ||
|Writable=No | |Writable=No | ||
| − | |ShortDesc=Identifies FPGA image version. | + | |ShortDesc=Identifies core (FPGA image) version. |
}} | }} | ||
Most significant nibble holds major version number; least significant nibble holds minor version number. | Most significant nibble holds major version number; least significant nibble holds minor version number. | ||
See {{NextRegNo|$0E}} for sub-minor version number. | See {{NextRegNo|$0E}} for sub-minor version number. | ||
Latest revision as of 17:40, 20 September 2020
| Number | $01 |
|---|---|
| Readable | Yes |
| Writable | No |
| Short Description | Identifies core (FPGA image) version. |
Most significant nibble holds major version number; least significant nibble holds minor version number.
See Core Version Register (sub minor) ($0E) for sub-minor version number.