Layer 2 Shadow RAM bank Register: Difference between revisions
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m Xalior moved page Layer 2 RAM Shadow Bank Register to Layer 2 Shadow RAM bank Register |
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|Readable=Yes | |Readable=Yes | ||
|Writable=Yes | |Writable=Yes | ||
|ShortDesc=Sets the [[Memory map|bank]] number where the Layer 2 shadow screen begins. | |||
}} | }} | ||
Bits 6-0 store the number of the "SRAM page" (ie, [[Memory map|bank]]) used for the shadow Layer 2 screen. The default is 11. Because the layer 2 screen is 48kiB, it actually occupies 3 banks, and the number set here is the first; so by default, it occupies banks 11-13. (bit 7 is reserved, use 0) | |||
For shadow bank paging see [[Layer_2]] | |||
Valid values are 0 to 109 (with 2MiB SRAM memory extension, 0 to 45 with default 1MiB memory). | |||
Latest revision as of 17:24, 13 October 2025
| Number | TBRegisterNumber::$13 |
|---|---|
| Readable | TBRegisterReadable::Yes |
| Writable | TBRegisterWritable::Yes |
| Short Description | [[ShortDesc::Sets the bank number where the Layer 2 shadow screen begins.]] |
Bits 6-0 store the number of the "SRAM page" (ie, bank) used for the shadow Layer 2 screen. The default is 11. Because the layer 2 screen is 48kiB, it actually occupies 3 banks, and the number set here is the first; so by default, it occupies banks 11-13. (bit 7 is reserved, use 0)
For shadow bank paging see Layer_2
Valid values are 0 to 109 (with 2MiB SRAM memory extension, 0 to 45 with default 1MiB memory).