Difference between revisions of "Expansion Bus Decoding b16-23 Register"

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(core 3.0 changes/refresh)
 
(core 3.1.3 changes/refresh)
 
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All bits are set to 1 upon hard reset.
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since core3.1.1: all bits are set to 1 when: soft reset and bit 31 is clear OR hard reset and bit 31 is set (otherwise content is kept intact). <del>All bits are set to 1 upon hard reset.</del>
  
 
When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.
 
When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.

Latest revision as of 19:03, 13 April 2020

Number $88
Readable Yes
Writable Yes
Short Description When expansion bus is enabled: Internal ports decoding mask
Bit Description
7 (bit 23) Masking decoding: SpecDrum DAC Output ($xxDF / 223) (DAC mono Specdrum)
6 (bit 22) Masking decoding: ($xxB3) (DAC mono GS Covox)
5 (bit 21) Masking decoding: ($xxFB) (DAC mono Pentagon/ATM (sd mode 2 off))
4 (bit 20) Masking decoding: ($xx0F) and ($xx4F) (DAC stereo Covox)
3 (bit 19) Masking decoding: ($xx3F) and ($xx5F) (DAC stereo profi Covox)
2 (bit 18) Masking decoding: ($xxF1), ($xxF3), ($xxF9) and ($xxFB) (DAC soundrive mode 2)
1 (bit 17) Masking decoding: ($xx0F), Kempston Joystick ($xx1F / 31), ($xx4F) and ($xx5F) (DAC soundrive mode 1)
0 (bit 16) Masking decoding: Turbo Sound Next Control ($FFFD / 65533) and Sound Chip Register Write ($BFFD / 49149)

since core3.1.1: all bits are set to 1 when: soft reset and bit 31 is clear OR hard reset and bit 31 is set (otherwise content is kept intact). All bits are set to 1 upon hard reset.

When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.

If the expansion bus is on, this allows I/O cycles for disabled internal ports to propagate to the expansion bus, otherwise corresponding I/O cycles to the expansion bus are filtered.

(note: Next registers with number higher than $7F are inaccessible from Copper code)