Turbo Sound Next

Turbo Sound Next is the audio system integrated on the Spectrum Next. It features 3 AY-3-8912 sound chips as used in the Spectrum, plus a MOS 6581 (SID) as used on the Commodore 64.

Chip Selection

Turbo Sound Next Control ($FFFD / 65533) controls the selected chip and enables and disables stereo channels per chip. Peripheral 3 Register ($08) controls the mapping of chip channels to stereo channels.

Once a sound chip is selected, Turbo Sound Next Control ($FFFD / 65533) also selects the active register on that chip. ||PortNo|$BFFD}} then allows it to be read or written.

AY-3-8912 layout

The 3 AY-3-8912 chips have the following register layout:

Register	Function
0	Channel A Fine Tune
1	Channel A Coarse Tune (4 bits)
2	Channel B Fine Tune
3	Channel B Coarse Tune (4 bits)
4	Channel C Fine Tune
5	Channel C Coarse Tune (4 bits)
6	Noise Period (5 bits)
7	Tone enable flags. Bits 0-2 enable tone on channels A, B, C respectively, but are inverted - 0 is enabled. Bits 3-5 enable noise on A, B, C are are likewise inverted.
8	Channel A amplitude. Bits 0-3 set the fixed amplitude which is used if bit 4 is 0. If bit 4 is 1, the envelope generator is used instead, and bits 0-3 are ignored.
9	Channel B amplitude, same as above.
10	Channel C amplitude, same as above.
11	Envelope period fine.
12	Envelope period coarse.
13	Envelope shape. Bits 0-3 alter the behavior of the envelope generator: Bit 0: "Hold"; If 1 the envelope generator performs one cycle then holds at the end value. If 0, it cycles continuously. Bit 1: "Alternate"; If 1 the envelope generator alters direction after each cycle. If 0, it resets after each cycle. If Hold is set, this instead chooses if the value held is the final value (0) or the initial value (1). Bit 2: "Attack"; if 1 the generator counts up. If 0 the generator counts down. Bit 3: "Continue"; if 0, the envelope generator performs one cycle then drops amplitude to 0 and stays there, overriding Hold. If 1, Hold is followed.

SID layout

The precise details of the SID's integration and timing have not yet been released. But the register map of the SID is as follows:

Register	Function
0	Channel 1 Fine Tune
1	Channel 1 Coarse Tune
2	Channel 1 Pulse Width Fine
3	Channel 1 Pulse Width Coarse (4 bits)
4	Channel 1 Control register. Bit mapped as follows: Bit 0: Gate. When set to 1, the "key is pressed" and the ADS cycle begins and holds. When set to 0, the "key is released" and the release cycle begins. Bit 1: Sync. Synchronises the channel with the channel 1 below it modulo 3 (1 syncs with 3, 3 with 2, 2 with 1, etc). Only frequency is synchronised. Bit 2: Ring. If triangle waveform is selected on this channel, replaces output of this channel with a ring modulated combination of the other two. Bit 3: Test. Clears and locks the channel when set. Bit 4: Sets triangle waveform. Bit 5: Sets sawtooth waveform. Bit 6: Sets pulse waveform. Bit 7: Sets noise waveform. The effect of turning on multiple waveform bits is not precisely documented, but can be exploited. However, mixing other waveforms with noise can crash the noise generator, requiring it to be reset via the TEST bit.
5	Channel 1 Attack (bits 4-7)/Decay (bits 3-0)
6	Channel 1 Sustain (bits 4-7)/Release (bits 3-0)
7-13	Channel 2, same pattern as above
14-20	Channel 3, same pattern as above
21	Filter cutoff fine (3 bits)
22	Filter cutoff coarse
23	Filter resonance (bits 4-7) and enable (bits 0-2 toggle the filter on channels 1, 2, 3 respectively. Bit 3 toggles it on external audio which is probably not useful)
24	Master volume (bits 0-3). Bits 4-6 configure the filter mode: in order, low pass, band pass, high pass. Bit 7 disables voice 3 from sounding if it is not filtered, so that it can be used for modulating other voices only.
25-26	Reads the analog joystick (!). Yes, the SID contained an analog joystick decoder. Probably not useful.
27	Reads the upper 8 bits of the oscillator output of channel 3, allowing it to be used for generating numbers for use by the CPU.
28	Reads the current output of the amplitude envelope generator for channel 3.