Vertical Line Count Offset Register: Difference between revisions
core 3.1.5 changes/refresh |
m Xalior moved page Vertical Video Line Offset Register to Vertical Line Count Offset Register: match formal nextreg.txt name |
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(No difference)
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Latest revision as of 11:25, 14 October 2025
| Number | TBRegisterNumber::$64 |
|---|---|
| Readable | TBRegisterReadable::Yes |
| Writable | TBRegisterWritable::Yes |
| Short Description | ShortDesc::Offset numbering of raster lines in copper/interrupt/active register |
Since core 3.1.5 (new register):
Bits 7-0 form offset value 0..255, the offset is added to Copper, Video Line Interrupt and Active Video Line readings.
Normally the ULA's pixel row 0 aligns with vertical line count 0. With a non-zero offset, the ULA's pixel row 0 will align with the vertical line offset.
Eg, if the offset is 32 then video line 32 will correspond to the first pixel row in the ULA and video line 0 will align with the first pixel row of the Tilemap and Sprites (in the top border area). Then Copper WAIT command waiting for line 0 will happen already in top border area.
Also Copper mode %11 restarting CPC=0 at pixel [0,0] (with offset 0) will be offset to new line!
Since a change in offset takes effect when the ULA reaches row 0, the change can take up to one frame to occur.
(also related: {{#ask: TBRegisterNumber::$1E }} ($1E), {{#ask: TBRegisterNumber::$1F }} ($1F), {{#ask: TBRegisterNumber::$22 }} ($22), {{#ask: TBRegisterNumber::$23 }} ($23) and Copper)