Difference between revisions of "Layer 2"
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Pixels can then be drawn to layer 2 by writing to the appropriate area of RAM. Layer 2 pixels are in English reading order with no ULA-style interlacing. Since there are 256 pixels per line and the memory port starts at $0000, the upper byte of the address exactly equals the Y coordinate (within the selected third of the screen) and the lower byte exactly equals the X coordinate. | Pixels can then be drawn to layer 2 by writing to the appropriate area of RAM. Layer 2 pixels are in English reading order with no ULA-style interlacing. Since there are 256 pixels per line and the memory port starts at $0000, the upper byte of the address exactly equals the Y coordinate (within the selected third of the screen) and the lower byte exactly equals the X coordinate. | ||
− | Note that | + | Note that you will need to manually clear the layer 2 screen before drawing on it, as it may contain random data when the machine starts up. |
System registers {{NextRegNo|$16}} and {{NextRegNo|$17}} apply a pixel shift to all content in layer 2, allowing scrolling effects to be created. | System registers {{NextRegNo|$16}} and {{NextRegNo|$17}} apply a pixel shift to all content in layer 2, allowing scrolling effects to be created. | ||
The functions of system registers {{NextRegNo|$12}} and {{NextRegNo|$13}} are unknown. | The functions of system registers {{NextRegNo|$12}} and {{NextRegNo|$13}} are unknown. |
Revision as of 23:47, 29 August 2017
Layer 2 is an additional graphics feature on the Next. It provides a 256-color screen at the full 256x192 resolution, in which every pixel is individually colored. Layer 2 may appear in place of, behind, or above the ULA-generated screen.
Documentation on Layer 2 is extremely sparse at the moment and could be subject to change. Information below has been taken from emulator documentation.
Each pixel of layer 2 is assigned 1 byte of video memory. This means layer 2 consumes a total of 48k. Since layer 2 is accessed through a 16k window, it is divided vertically into 3 banks of 64 lines each, each of which is exactly 16k.
Layer 2 is controlled via Layer 2 Access Port ($123B / 4667), which is bit mapped as follows:
Bit | Description |
---|---|
6-7 | Video RAM bank select |
3 | Shadow Layer 2 RAM select |
1 | Layer 2 visible |
0 | Enable Layer 2 write paging |
When bit 0 of $123B is set to 1, the appropriate area of Layer 2 video memory (as set by bits 6-7) is banked into slot 1, ie memory area $0000-$3fff (see Memory map). Be warned, this banks out the ROM! Make sure to disable interrupts or use a custom interrupt handler.
Pixels can then be drawn to layer 2 by writing to the appropriate area of RAM. Layer 2 pixels are in English reading order with no ULA-style interlacing. Since there are 256 pixels per line and the memory port starts at $0000, the upper byte of the address exactly equals the Y coordinate (within the selected third of the screen) and the lower byte exactly equals the X coordinate.
Note that you will need to manually clear the layer 2 screen before drawing on it, as it may contain random data when the machine starts up.
System registers Layer 2 X Offset Register ($16) and Layer 2 Y Offset Register ($17) apply a pixel shift to all content in layer 2, allowing scrolling effects to be created.
The functions of system registers Layer 2 RAM Page Register ($12) and Layer 2 RAM Shadow Page Register ($13) are unknown.