Extended Z80 instruction set

Standard and Extended Z80 Instructions

Register and Data manipulation

LD (LoaD)

The basic data load/transfer instruction. Transfers data from the location specified by the second argument, to the location specified by the first. Available combinations are as follows:

• Any 8-bit register can be:
  • loaded with an immediate value;
  • loaded with the contents of any other 8-bit register except I and R;
  • loaded with the contents of, or stored in, memory pointed to by HL;
  • loaded with the contents of, or stored in, memory offset-indexed by IX or IY.
• Additionally, the accumulator A (only) can be:
  • loaded with the contents of, or stored in, memory pointed to by BC or DE;
  • loaded with the contents of, or stored in, memory pointed to by an immediate address;
  • loaded with the contents of I or R.
• Any 16-bit register pair can be:
  • loaded with an immediate value;
  • loaded with the contents of, or stored in, memory pointed to by an immediate address.
• Additionally, SP (only) can be:
  • loaded with the contents of HL, IX, or IY.

Although 16-bit register pairs cannot be directly moved between each other, they can be moved by moving the two 8-bit registers. (SP gets a special case because it can't be addressed via 8-bit registers.) Some assemblers will provide built-in macro instructions allowing, for example, ld bc, de.

EX (EXchange)

Exchanges the contents of two sources. The only permitted combinations are

• Exchanging DE and HL;
• Exchanging AF and AF';
• Exchanging HL, IX, or IY with the contents of memory pointed to by SP.

Has no effect on flags (unless AF is exchanged, of course)

EXX (EXchange all)

Exchanges BC, DE, and HL with their shadow registers. AF and AF' are not exchanged. Has no effect on flags.

PUSH

Pushes the given argument on the stack. This can be any 16-bit register pair except SP. SP is reduced by 2 and then the argument is written to the new location SP points to.

POP

Pops the given argument from the stack. This can be any 16-bit register pair except SP. The current value at SP is copied to the register pair and then SP is raised by 2.

Block Copy

LDI (LoaD and Increment)

Copies the byte pointed to by HL to the address pointed to by DE, then adds 1 to DE and HL and subtracts 1 from BC. If BC did not reach 0, P/V is reset, otherwise it is set. H and N are reset.

LDIR (LoaD and Increment Repeated)

Automatically loops LDI until BC reaches zero. Note that no loop occurs when BC reaches zero.

LDD (LoaD and Decrement)

Same as LDI, but subtracts 1 from DE and HL instead of adding.

LDDR (LoaD and Decrement Repeated)

Same as LDIR but loops LDD instead of LDI.

LDIX, LDIRX, LDDX, LDDRX

Next-only extended opcodes. Behave the same as their non-X equivalents except the byte is not copied if it is equal to A.

Block Search

CPI (ComPare and Increment)

Compares the byte pointed to by HL with the contents of A and sets Z if it matches. Then adds 1 to HL and subtracts 1 from BC. Sets P/V if BC did not reach 0 or resets it if it did.

CPIR (ComPare and Increment Repeated)

Automatically loops CPI until either Z is set (A is found in the byte pointed to by HL) or P/V is reset (BC reached 0).

CPD (ComPare and Decrement)

Same as CPI, but subtracts 1 from HL instead of adding it.

CPDR (ComPare and Decrement Repeated)

Same as CPIR but loops CPD instead of CPI.

Arithmetic

ADD

Adds values together. Legal combinations are:

• When adding 8-bit values the first parameter must be A and the second may be:
  • The contents of an 8-bit register;
  • An immediate value;
  • The contents of memory pointed to by HL or by indexing based on IX or IY.
• When adding 16-bit values the first parameter must be HL, IX or IY and the second must be another 16-bit register pair.
• On the Spectrum Next the extended opcodes also allow the first parameter to be HL, DE, or BC and the second to be A.

ADC (ADd with Carry)

Adds values together, adding an additional 1 if Carry is set. Legal combinations are the same as for ADD, although there are no extended opcode versions of ADC and in 16-bit values the first parameter can only be HL.

SUB

Subtracts a value from A. Legal combinations are the same as for ADD for 8-bit, except that A does not need to be specified as the first parameter because subtraction can only be done from A. SUB cannot be used for 16-bit numbers.

SBC (SuBtract with Carry)

Subtracts values, subtracting an additional 1 if Carry is set. Legal combinations are the same as for ADD, although there are no extended opcode versions of SBC and in 16-bit values the first parameter can only be HL.

AND, OR, XOR

Performs the appropriate bitwise operator on A. Legal combinations are the same as SUB.

CP (ComPare)

Sets the flags as if a SUB was performed but does not perform it. Legal combinations are the same as SUB. This is commonly used to set the flags to perform an equality or greater/less test.

INC

Increments the target by one. The argument can be any 8-bit register, any 16-bit register pair, or the address pointed to by HL or indexed via IX or IY.

DEC

Decrements the target by one. Allowed arguments are the same as INC.

RLC (Rotate Left and Copy)

Rotates the target bitwise left by one position. The MSB is copied to bit 0, and also to Carry. Can be applied to any 8-bit register or to a location in memory pointed to by HL or indexed via IX or IY.

RL (Rotate Left)

Same as RLC, except the MSB is copied to Carry only, and the previous contents of Carry are copied to bit 0.

RRC, RR (Rotate Right and Copy, Rotate Right)

Same as RLC and RL except they rotate right instead of left.

SLA (Shift Left Arithmetic)

Same as RL except bit 0 is set to zero, not the previous contents of Carry.

SRA (Shift Right Arithmetic?)

Same as RR except the MSB is left unchanged, not replaced with the previous contents of Carry.

SRL (Shift Right Logical?)

Same as SLA except it shifts right instead of left.

RLCA, RLA, RRCA, RRA

Same as their matching instruction except they work only on A, are slightly faster, and do not alter S, Z or P/V.

RLD

Rotates the lower nibble of the byte pointed to by HL, the upper nibble of that byte, and the lower nibble of A, in that order.

RRD

Same as RLD, but the order is: the lower nibble pointed to by HL, the lower nibble of the A, and the upper nibble of the byte.

CPL

Inverts the contents of the accumulator.

NEG

Subtracts the contents of the accumulator from zero, making it negative for the purpose of two's complement.

CCF

Inverts the carry flag. (Does not, as might be assumed, clear it!)

SCF

Sets the carry flag.

BIT

Tests if a bit is set on target value. The first parameter states which bit. The second can be any 8-bit register, or the location in memory pointed to by HL or indexed by IX or IY.

SET

Sets the numbered bit on target value. The possible targets are the same as BIT.

RES

Resets the numbered bit on target value. The possible targets are the same as BIT.

DAA

Modifies the accumulator for binary coded decimal.

Control Flow

JP (JumP)

Jumps (sets the PC) to the given address. The address can be given immediately or read from HL, IX, or IY.

JP cc

Conditionally jumps (sets the PC) to the given address. The condition is set in terms of the flags: Zero (Z, NZ), Carry (C, NC), Parity (PO, PE), and Sign (P/M). The address can only be given immediately for a conditional jump.

JR (Jump Relative)

Jumps to an alternate address by adding the parameter to the PC - in other words the parameter is an adjustment, not an absolute address. When used in an assembler with labels the syntax should be the same as JP. The JR address can only be given immediately. Conditions are legal, but only those based on carry and zero.

DJNZ (Decrement and Jump if Not Zero)

Decrements B then performs JR NZ.. to the given address. Used for encapsulating loops.

CALL

Like JP (including the ability to have conditions), but PUSHes the PC before jumping. Used for subroutine calls.

RET

POPs the PC from the stack, returning from a previous CALL. This can also accept the same conditions as JP.

RETI

Returns from an interrupt service routine.

RETN

Returns from a non-maskable interrupt service routine.

RST

Performs a CALL to a routine located at one of eight fixed locations in the zero page. This is located in ROM, and on the Spectrum only a limited number of values are useful to call built-in ROM routines.

NOP

Does nothing.

HALT

Suspends the CPU until an interrupt is received.

DI

Disables maskable interrupts.

EI

Enables maskable interrupts.

IM

Sets interrupt handling mode. The default for Next is 1. 2 is used for user defined interrupt service routines.

Input and Output

IN r, (c); OUT (c), r

Inputs or outputs a byte value from the 16-bit port number given in BC. R can be any 8-bit register. Note that the port number is given in BC even though the instruction refers only to C. Some assemblers will allow the instruction to be written with "(bc)" instead of "(c)" as a reminder.

IN a, (n); OUT (n), a

Inputs or outputs the byte value in A from a 16-bit port number where the lower byte is N and the upper byte is A. This is only likely to be useful in cases where the upper byte of the port number is not relevant.

INI

Inputs a value from port BC into memory at the address stored in HL, then increments HL and decrements B. Because B is decremented and is part of the port number, the port number for future INI instructions will change unless it is reset.

INIR

Loops INIR until B reaches 0. Because B is decremented during this process and is part of the port number, this is unlikely to be useful except when the upper byte of the port number is not relevant.

IND, INDR

Behave like INI and INIR except that HL is decremented instead of incremented.

OUTI, OTIR, OUTD, OTDR

Behave like INI, INIR, IND, INDR except that they output instead of input and B is decremented before the output instead of after.