UART Frame: Difference between revisions
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Created page with "{{Port |Number=$163B |NumberDec=5691 |PortMask=%0001 0110 0011 1011 |ShortDesc=UART Frame |Readable=Yes |Writable=Yes |Subsystem=UART }} 0x163B UART Frame (R/W) (hard reset =..." |
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Revision as of 22:03, 1 July 2022
| Number | PortNumber::$163B |
|---|---|
| Decimal | NumberDec::5691 |
| Short desc. | ShortDesc::UART Frame |
| Bit Mask | [[PortMask::%0001 0110 0011 1011]] |
| Readable | Readable::Yes |
| Writable | Writable::Yes |
| Subsystem | Subsystem::UART |
0x163B UART Frame (R/W) (hard reset = 0x18) bit 7 = 1 to immediately reset the Tx and Rx modules to idle and empty fifos bit 6 = 1 to assert break on Tx (Tx = 0) when Tx reaches idle bit 5 = 1 to enable hardware flow control * bits 4:3 = number of bits in a frame
11 = 8 bits 10 = 7 bits 01 = 6 bits 00 = 5 bits
bit 2 = 1 to enable parity check bit 1 = 0 for even parity, 1 for odd parity bit 0 = 0 for one stop bit, 1 for two stop bits
- The esp ignores hardware flow control
- In joystick i/o mode only cts is available