Expansion Bus Decoding b8-15 Register: Difference between revisions

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All bits are set to 1 upon hard reset.
since core3.1.1: all bits are set to 1 when: soft reset and bit 31 is clear OR hard reset and bit 31 is set (otherwise content is kept intact). <del>All bits are set to 1 upon hard reset.</del>


When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.
When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.

Latest revision as of 19:03, 13 April 2020

Number TBRegisterNumber::$87
Readable TBRegisterReadable::Yes
Writable TBRegisterWritable::Yes
Short Description ShortDesc::When expansion bus is enabled: Internal ports decoding mask
Bit Description
7 (bit 15) Masking decoding: {{#ask:

PortNumber::$123B }} ($123B{{#ask: PortNumber::$123B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }})

6 (bit 14) Masking decoding: {{#ask:

PortNumber::$xx57 }} ($xx57{{#ask: PortNumber::$xx57 |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}), {{#ask: PortNumber::$xx5B }} ($xx5B{{#ask: PortNumber::$xx5B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) and {{#ask: PortNumber::$303B }} ($303B{{#ask: PortNumber::$303B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }})

5 (bit 13) Masking decoding: {{#ask:

PortNumber::$FADF }} ($FADF{{#ask: PortNumber::$FADF |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}), {{#ask: PortNumber::$FBDF }} ($FBDF{{#ask: PortNumber::$FBDF |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) and {{#ask: PortNumber::$FFDF }} ($FFDF{{#ask: PortNumber::$FFDF |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }})

4 (bit 12) Masking decoding: {{#ask:

PortNumber::$133B }} ($133B{{#ask: PortNumber::$133B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}), {{#ask: PortNumber::$143B }} ($143B{{#ask: PortNumber::$143B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) and {{#ask: PortNumber::$153B }} ($153B{{#ask: PortNumber::$153B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) (UART)

3 (bit 11) Masking decoding: {{#ask:

PortNumber::$xxE7 }} ($xxE7{{#ask: PortNumber::$xxE7 |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) and {{#ask: PortNumber::$xxEB }} ($xxEB{{#ask: PortNumber::$xxEB |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) (SPI)

2 (bit 10) Masking decoding: {{#ask:

PortNumber::$103B }} ($103B{{#ask: PortNumber::$103B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) and {{#ask: PortNumber::$113B }} ($113B{{#ask: PortNumber::$113B |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }})

1 (bit 9) Masking decoding: Multiface (two variable ports)
0 (bit 8) Masking decoding: {{#ask:

PortNumber::$xxE3 }} ($xxE3{{#ask: PortNumber::$xxE3 |mainlabel=- |headers=hide |intro= /  |?NumberDec#- }}) (DivMMC control)

since core3.1.1: all bits are set to 1 when: soft reset and bit 31 is clear OR hard reset and bit 31 is set (otherwise content is kept intact). All bits are set to 1 upon hard reset.

When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.

If the expansion bus is on, this allows I/O cycles for disabled internal ports to propagate to the expansion bus, otherwise corresponding I/O cycles to the expansion bus are filtered.

(note: Next registers with number higher than $7F are inaccessible from Copper code)