Alternate ROM Register: Difference between revisions
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core 3.0.5 changes/refresh |
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| 0 || 1 to lock 48k ROM | | 0 || 1 to lock 48k ROM | ||
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Set to 0 upon hard reset. | |||
(new register since core 3.0.5) | (new register since core 3.0.5) | ||
(note: Next registers with number higher than $7F are inaccessible from Copper code) | (note: Next registers with number higher than $7F are inaccessible from Copper code) | ||
Revision as of 22:46, 4 December 2019
| Number | TBRegisterNumber::$8C |
|---|---|
| Readable | TBRegisterReadable::Yes |
| Writable | TBRegisterWritable::Yes |
| Short Description | ShortDesc::Enable alternate ROM or lock 48k ROM |
| Bit | Description |
|---|---|
| Values affecting machine immediately | |
| 7 | 1 to enable alternate ROM |
| 6 | 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads |
| 4 | 1 to lock 48k ROM |
| After soft reset (will be copied to bits 7-4) | |
| 3 | 1 to enable alternate ROM |
| 2 | 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads |
| 0 | 1 to lock 48k ROM |
Set to 0 upon hard reset.
(new register since core 3.0.5)
(note: Next registers with number higher than $7F are inaccessible from Copper code)