Difference between revisions of "Memory Paging Control"

From SpecNext official Wiki
Jump to: navigation, search
(core 3.0 changes/refresh)
Line 20: Line 20:
 
| 4 || ROM select (low bit of ROM select on +2/+3)
 
| 4 || ROM select (low bit of ROM select on +2/+3)
 
|-
 
|-
| 3 || Shadow Screen toggle
+
| 3 || Shadow Screen toggle - this is ULA layer shadow, not related to {{NextRegNo|$13}}
When 1, the "Layer 2" is disabled due to ULA screen being read from other memory bank. For double-buffered ULA screen together with Layer 2 functionality the {{PortNo|$xxFF}} is suggested.
 
 
|-
 
|-
 
| 0-2 || Bank number for slot 4 ($C000)
 
| 0-2 || Bank number for slot 4 ($C000)
 
|}
 
|}
 +
 +
Since core3.0 the Layer 2 can be used together with shadow ULA screen from Bank 7 (previous cores did disable Layer 2).

Revision as of 05:21, 1 December 2019

Number $7FFD
Decimal
Short desc. Selects active RAM, ROM, and displayed screen.
Bit Mask %01-- ---- ---- --0-
Readable No
Writable Yes
Subsystem Memory map

Selects the active memory page in slot 4 at $C000. See Memory map.

Any values written to this port should also be stored at $5B5C if any OS routines are in use.

Bit Effect
6-7 Undocumented
5 Lock memory paging (setting to 1 locks pages and cannot be unlocked until next reset)
4 ROM select (low bit of ROM select on +2/+3)
3 Shadow Screen toggle - this is ULA layer shadow, not related to Layer 2 RAM Shadow Page Register ($13)
0-2 Bank number for slot 4 ($C000)

Since core3.0 the Layer 2 can be used together with shadow ULA screen from Bank 7 (previous cores did disable Layer 2).