Difference between revisions of "Plus 3 Memory Paging Control"
From SpecNext official Wiki
(core 3.0 changes) |
|||
Line 12: | Line 12: | ||
! Bit !! Effect | ! Bit !! Effect | ||
|- | |- | ||
− | | | + | | 7-3 || Unused, use 0 (Printer Port Strobe b4 and Disk motor enable b3 are not implemented in core3.0) |
− | |||
− | |||
− | |||
− | |||
|- | |- | ||
| 2 || Normal mode: High bit of ROM selection. | | 2 || Normal mode: High bit of ROM selection. |
Revision as of 05:41, 4 October 2019
Number | $1FFD |
---|---|
Decimal | |
Short desc. | Controls ROM paging and special paging options from the +2a/+3. |
Bit Mask | %0001 ---- ---- --0- |
Readable | No |
Writable | Yes |
Subsystem | Memory map |
Bit mapped to control paging options.
Bit | Effect |
---|---|
7-3 | Unused, use 0 (Printer Port Strobe b4 and Disk motor enable b3 are not implemented in core3.0) |
2 | Normal mode: High bit of ROM selection.
Special mode: High bit of memory configuration number (see Memory map). |
1 | Special mode: Low bit of memory configuration number. |
0 | Paging mode. 0=Normal, 1=Special. |
Any values written to this port should also be stored in $5B67 if you intend to use any OS routines.
NEW in core 3.0:
When exiting +3 special paging mode, the banks 5 and 2 are mapped back at regular place.