Xilinx-Artix-7 FPGA - Revision history

Mikecad at 09:27, 19 July 2025

2025-07-19T09:27:31Z

← Older revision		Revision as of 10:27, 19 July 2025
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	Although the ~~two~~ FPGA models require different bitstreams due to the differing FPGA architectures, all systems are designed to remain '''feature-identical wherever possible''' in the Next Core to avoid splitting the user base. The KS2 and KS3 larger FPGA's could provide alternate cores with extra features - e.g. the Official QL core has Sprites on a KS2 to create an enhanced QL.		Although the Spartan and Artix FPGA models require different bitstreams due to the differing FPGA architectures, all systems are designed to remain '''feature-identical wherever possible''' in the Next Core to avoid splitting the user base. The KS2 and KS3 larger FPGA's could provide alternate cores with extra features - e.g. the Official QL core has Sprites on a KS2 to create an enhanced QL.

	The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:		The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:

Mikecad at 09:24, 19 July 2025

2025-07-19T09:24:55Z

← Older revision		Revision as of 10:24, 19 July 2025
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	The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices.		The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices.

	Below is a comparison between the ~~two~~ FPGAs:		Below is a comparison between the three FPGAs:

	{\| class="wikitable"		{\| class="wikitable"
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	\| Flip-Flops \|\| 18,224 \|\| 20,800 \|\| 41,600		\| Flip-Flops \|\| 18,224 \|\| 20,800 \|\| 41,600
	\|-		\|-
	\| Block RAM \|\| 576 Kbits \|\| 918 Kbits \|\| 1,800		\| Block RAM \|\| 576 Kbits \|\| 918 Kbits \|\| 1,800 Kbits
	\|-		\|-
	\| DSP Slices \|\| 32 \|\| 45 \|\| 90		\| DSP Slices \|\| 32 \|\| 45 \|\| 90

Timgilberts at 08:44, 19 July 2025

2025-07-19T08:44:58Z

← Older revision		Revision as of 09:44, 19 July 2025
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	\|}		\|}

	Although the two models require different bitstreams due to the differing FPGA architectures, ~~both~~ systems are designed to remain '''feature-identical wherever possible''' to avoid splitting the user base.		Although the two FPGA models require different bitstreams due to the differing FPGA architectures, all systems are designed to remain '''feature-identical wherever possible''' in the Next Core to avoid splitting the user base. The KS2 and KS3 larger FPGA's could provide alternate cores with extra features - e.g. the Official QL core has Sprites on a KS2 to create an enhanced QL.

	The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:		The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:

Timgilberts at 08:42, 19 July 2025

2025-07-19T08:42:41Z

← Older revision		Revision as of 09:42, 19 July 2025
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	{\| class="wikitable"		{\| class="wikitable"
	! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4) !! Artix-7 XC7A35T-2		! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4) !! Artix-7 XC7A35T-2 (KS3)
	\|-		\|-
	\| Technology Node \|\| 45 nm \|\| 28 nm \|\| 28nm		\| Technology Node \|\| 45 nm \|\| 28 nm \|\| 28nm

Timgilberts at 08:42, 19 July 2025

2025-07-19T08:42:11Z

Timgilberts at 08:20, 19 July 2025

2025-07-19T08:20:48Z

← Older revision		Revision as of 09:20, 19 July 2025
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	The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.		The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.

			The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices. This page will be updated with more details

	Below is a comparison between the two FPGAs:		Below is a comparison between the two FPGAs:

Em00k: /* External Links */

2025-04-06T23:37:29Z

External Links

← Older revision		Revision as of 00:37, 7 April 2025
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	== External Links ==		== External Links ==
	* [https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf Xilinx Spartan-6 XC6SLX16 Data Sheet]		* [https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf Xilinx Spartan-6 XC6SLX16 Data Sheet]
	* [https://docs.amd.com/v/u/en-US/ds180_7Series_Overview]		* [https://docs.amd.com/v/u/en-US/ds180_7Series_Overview Xilinx Artix-7 XC7A15T CSG324-1 Data Sheet]

Em00k: Created page with "== FPGA Upgrade: Artix-7 vs Spartan-6 == The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Sparta..."

2025-04-06T23:35:05Z

Created page with "== FPGA Upgrade: Artix-7 vs Spartan-6 == The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Sparta..."

New page

== FPGA Upgrade: Artix-7 vs Spartan-6 ==

The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.

Below is a comparison between the two FPGAs:

{| class="wikitable"
! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4)
|-
| Technology Node || 45 nm || 28 nm
|-
| Logic Cells || ~14,579 || ~16,640
|-
| Flip-Flops || 18,224 || 20,800
|-
| Block RAM || 576 Kbits || 918 Kbits
|-
| DSP Slices || 32 || 45
|-
| Power Consumption || Higher || Lower (static & dynamic)
|-
| Clock Management || PLL-based || MMCMs and PLLs (more flexible)
|-
| Toolchain || Xilinx ISE (legacy) || Xilinx Vivado (modern)
|-
| Partial Reconfiguration || Not supported || Supported
|}

Although the two models require different bitstreams due to the differing FPGA architectures, both systems are designed to remain '''feature-identical wherever possible''' to avoid splitting the user base.

The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:

* {{NextRegNo|$F0}} – XDEV CMD
* {{NextRegNo|$F8}} – XADC REG
* {{NextRegNo|$F9}} – XADC D0
* {{NextRegNo|$FA}} – XADC D1

These registers allow developers to interact with internal Xilinx features such as the DNA ID and XADC (analog-to-digital converter). Technical documentation for these registers can be found on their respective pages.

== External Links ==
* [https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf Xilinx Spartan-6 XC6SLX16 Data Sheet]
* [https://docs.amd.com/v/u/en-US/ds180_7Series_Overview]

← Older revision		Revision as of 09:42, 19 July 2025
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	The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.		The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.

	The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices. ~~This page will be updated with more details~~		The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices.

	Below is a comparison between the two FPGAs:		Below is a comparison between the two FPGAs:

	{\| class="wikitable"		{\| class="wikitable"
	! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4)		! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4) !! Artix-7 XC7A35T-2
	\|-		\|-
	\| Technology Node \|\| 45 nm \|\| 28 nm		\| Technology Node \|\| 45 nm \|\| 28 nm \|\| 28nm
	\|-		\|-
	\| Logic Cells \|\| ~14,579 \|\| ~16,640		\| Logic Cells \|\| ~14,579 \|\| ~16,640 \|\| ~33,280
	\|-		\|-
	\| Flip-Flops \|\| 18,224 \|\| 20,800		\| Flip-Flops \|\| 18,224 \|\| 20,800 \|\| 41,600
	\|-		\|-
	\| Block RAM \|\| 576 Kbits \|\| 918 Kbits		\| Block RAM \|\| 576 Kbits \|\| 918 Kbits \|\| 1,800
	\|-		\|-
	\| DSP Slices \|\| 32 \|\| 45		\| DSP Slices \|\| 32 \|\| 45 \|\| 90
	\|-		\|-
	\| Power Consumption \|\| Higher \|\| Lower (static & dynamic)		\| Power Consumption \|\| Higher \|\| Lower (static & dynamic) \|\| Lower (static & dynamic)
	\|-		\|-
	\| Clock Management \|\| PLL-based \|\| MMCMs and PLLs (more flexible)		\| Clock Management \|\| PLL-based \|\| MMCMs and PLLs (more flexible) \|\| MMCMs and PLLs (more flexible)
	\|-		\|-
	\| Toolchain \|\| Xilinx ISE (legacy) \|\| Xilinx Vivado (modern)		\| Toolchain \|\| Xilinx ISE (legacy) \|\| Xilinx Vivado (modern) \|\| Xilinx Vivado (modern)
	\|-		\|-
	\| Partial Reconfiguration \|\| Not supported \|\| Supported		\| Partial Reconfiguration \|\| Not supported \|\| Supported \|\| Supported
	\|}		\|}