Turbo Sound Next - Revision history

Em00k: /* AY-3-8912 layout */

2025-05-25T12:01:42Z

AY-3-8912 layout

← Older revision		Revision as of 13:01, 25 May 2025
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	\| 6 \|\| Noise Period (5 bits)		\| 6 \|\| Noise Period (5 bits)
	\|-		\|-
	\| 7 \|\| Tone enable flags. Bits 0-2 enable tone on channels A, B, C respectively, but are inverted - 0 is enabled. Bits 3-5 enable noise on A, B, C are are likewise inverted.		\| 7 \|\| Tone enable flags.

			Bits 0-2 enable tone on channels A, B, C respectively, but are inverted - 0 is enabled.

			Bits 3-5 enable noise on A, B, C are are likewise inverted.
	\|-		\|-
	\| 8 \|\| Channel A amplitude. Bits 0-3 set the fixed amplitude which is used if bit 4 is 0. If bit 4 is 1, the envelope generator is used instead, and bits 0-3 are ignored.		\| 8 \|\| Channel A amplitude.

			Bits 0-3 set the fixed amplitude which is used if bit 4 is 0. If bit 4 is 1, the envelope generator is used instead, and bits 0-3 are ignored.
	\|-		\|-
	\| 9 \|\| Channel B amplitude, same as above.		\| 9 \|\| Channel B amplitude, same as above.
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	\| 12 \|\| Envelope period coarse.		\| 12 \|\| Envelope period coarse.
	\|-		\|-
	\| 13 \|\| Envelope shape. Bits 0-3 alter the behaviour of the envelope generator:		\| 13 \|\| Envelope shape.
			Bits 0-3 alter the behaviour of the envelope generator:
	Bit 0: "Hold"; If 1 the envelope generator performs one cycle then holds at the end value. If 0, it cycles continuously.		Bit 0: "Hold"; If 1 the envelope generator performs one cycle then holds at the end value. If 0, it cycles continuously.

Em00k at 19:05, 24 May 2025

2025-05-24T19:05:30Z

← Older revision		Revision as of 20:05, 24 May 2025
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	A MOS 6581 (SID), as used on the Commodore 64, was experimentally added to the FPGA during development but it was later removed due to the large amount of space it takes up (it is 4 times as big as an AY).		A MOS 6581 (SID), as used on the Commodore 64, was experimentally added to the FPGA during development but it was later removed due to the large amount of space it takes up (it is 4 times as big as an AY).

	For information on playing back PT3 files, have a look here : [[https://wiki.specnext.dev/Code:PT3 \|Various PT3 replay methods]]		For information on playing back PT3 files, have a look here : [[https://wiki.specnext.dev/Code:PT3 Various PT3 replay methods]]

	= Chip Selection =		= Chip Selection =

Em00k at 19:04, 24 May 2025

2025-05-24T19:04:45Z

← Older revision		Revision as of 20:04, 24 May 2025
Line 3:		Line 3:
	A MOS 6581 (SID), as used on the Commodore 64, was experimentally added to the FPGA during development but it was later removed due to the large amount of space it takes up (it is 4 times as big as an AY).		A MOS 6581 (SID), as used on the Commodore 64, was experimentally added to the FPGA during development but it was later removed due to the large amount of space it takes up (it is 4 times as big as an AY).

	For information on playing back PT3 files, have a look here : [[https://wiki.specnext.dev/Code:PT3\|Various PT3 replay methods]]		For information on playing back PT3 files, have a look here : [[https://wiki.specnext.dev/Code:PT3 \|Various PT3 replay methods]]

	= Chip Selection =		= Chip Selection =

Em00k at 19:03, 24 May 2025

2025-05-24T19:03:41Z

← Older revision		Revision as of 20:03, 24 May 2025
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	\| 12 \|\| Envelope period coarse.		\| 12 \|\| Envelope period coarse.
	\|-		\|-
	\| 13 \|\| Envelope shape. Bits 0-3 alter the ~~behavior~~ of the envelope generator:		\| 13 \|\| Envelope shape. Bits 0-3 alter the behaviour of the envelope generator:
	Bit 0: "Hold"; If 1 the envelope generator performs one cycle then holds at the end value. If 0, it cycles continuously.		Bit 0: "Hold"; If 1 the envelope generator performs one cycle then holds at the end value. If 0, it cycles continuously.

Em00k at 19:03, 24 May 2025

2025-05-24T19:03:19Z

← Older revision		Revision as of 20:03, 24 May 2025
Line 2:		Line 2:

	A MOS 6581 (SID), as used on the Commodore 64, was experimentally added to the FPGA during development but it was later removed due to the large amount of space it takes up (it is 4 times as big as an AY).		A MOS 6581 (SID), as used on the Commodore 64, was experimentally added to the FPGA during development but it was later removed due to the large amount of space it takes up (it is 4 times as big as an AY).

			For information on playing back PT3 files, have a look here : [[https://wiki.specnext.dev/Code:PT3\|Various PT3 replay methods]]

	= Chip Selection =		= Chip Selection =

Howprice: Added link to NextReg $06

2020-12-16T20:15:27Z

Added link to NextReg $06

← Older revision		Revision as of 21:15, 16 December 2020
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	Once a sound chip is selected, {{PortNo\|$FFFD}} also selects the active register on that chip. {{PortNo\|$BFFD}} then allows it to be read or written.		Once a sound chip is selected, {{PortNo\|$FFFD}} also selects the active register on that chip. {{PortNo\|$BFFD}} then allows it to be read or written.

			{{NextRegNo\|$06}} controls audio chip mode.

	= AY-3-8912 layout =		= AY-3-8912 layout =

Howprice: Added link to NextReg $09

2020-12-16T20:11:12Z

Added link to NextReg $09

← Older revision		Revision as of 21:11, 16 December 2020
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	= Chip Selection =		= Chip Selection =
	{{PortNo\|$FFFD}} controls the selected chip and enables and disables stereo channels per chip. {{NextRegNo\|$08}} controls the mapping of chip channels to stereo channels.		{{PortNo\|$FFFD}} controls the selected chip and enables and disables stereo channels per chip. {{NextRegNo\|$08}} controls the mapping of chip channels to stereo channels and {{NextRegNo\|$09}} can be used to enable "mono" output per chip.

	Once a sound chip is selected, {{PortNo\|$FFFD}} also selects the active register on that chip. {{PortNo\|$BFFD}} then allows it to be read or written.		Once a sound chip is selected, {{PortNo\|$FFFD}} also selects the active register on that chip. {{PortNo\|$BFFD}} then allows it to be read or written.

SevenFFF at 15:17, 5 July 2019

2019-07-05T15:17:33Z

← Older revision		Revision as of 16:17, 5 July 2019
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	\|}		\|}

	AY I/O registers 14 and 15 are not implemented on the Next, so bit-banged software written to use RS-232 and AUX ports on the Amstrad Spectrum models is not supported. The Next has a separate high-speed hardware UART, which can be connected to the [[ESP8266-01]] wifi module or a wired RS-232 cable. The UART is interfaced through the {{PortNo\|$133B}} and {{PortNo\|$143B}} ports.		AY I/O registers 14 and 15 are not implemented on the Next, so bit-banged software written to use RS-232 and AUX ports on the Amstrad Spectrum models is not supported. The Next has a separate high-speed hardware [[UART]], which can be connected to the [[ESP8266-01]] wifi module or a wired RS-232 cable. The UART is interfaced through the {{PortNo\|$133B}} and {{PortNo\|$143B}} ports.

SevenFFF at 15:15, 5 July 2019

2019-07-05T15:15:48Z

← Older revision		Revision as of 16:15, 5 July 2019
Line 50:		Line 50:
	\|}		\|}

	AY I/O registers 14 and 15 are not implemented on the Next, so software written to use RS-232 and AUX ports on the Amstrad Spectrum models is not supported. The Next has a separate high-speed UART, which can be connected to the [[ESP8266-01]] wifi module or a wired RS-232 cable. The UART is interfaced through the {{PortNo\|$133B}} and {{PortNo\|$143B}} ports.		AY I/O registers 14 and 15 are not implemented on the Next, so bit-banged software written to use RS-232 and AUX ports on the Amstrad Spectrum models is not supported. The Next has a separate high-speed hardware UART, which can be connected to the [[ESP8266-01]] wifi module or a wired RS-232 cable. The UART is interfaced through the {{PortNo\|$133B}} and {{PortNo\|$143B}} ports.

SevenFFF at 15:13, 5 July 2019

2019-07-05T15:13:45Z

← Older revision		Revision as of 16:13, 5 July 2019
Line 50:		Line 50:
	\|}		\|}

	I/O registers 14 and 15 are not implemented on the Next, so software written to use RS-232 and AUX ports on the Amstrad Spectrum models is not supported. The Next has a separate high-speed UART, which can be connected to the [[ESP8266-01]] wifi module or a wired RS-232 cable. The UART is interfaced through the {{PortNo\|$133B}} and {{PortNo\|$143B}} ports.		AY I/O registers 14 and 15 are not implemented on the Next, so software written to use RS-232 and AUX ports on the Amstrad Spectrum models is not supported. The Next has a separate high-speed UART, which can be connected to the [[ESP8266-01]] wifi module or a wired RS-232 cable. The UART is interfaced through the {{PortNo\|$133B}} and {{PortNo\|$143B}} ports.