Expansion Bus I/O Propagate Register - Revision history

Sol HSA: updated to 78a6ee50

2024-11-03T11:50:19Z

updated to 78a6ee50

← Older revision		Revision as of 12:50, 3 November 2024
Line 8:		Line 8:
	! Bit !! Description		! Bit !! Description
	\|-		\|-
	\| 7-5 \|\| Reserved, must be 0		\| 7-6 \|\| Reserved, must be 0
			\|-
			\| 5 \|\| Propagate port 0xeff7 io cycles (hard reset = 0)
	\|-		\|-
	\| 4 \|\| (since core3.1.2) Propagate port {{PortNo\|$xxFF}} I/O cycles (hard reset = 0)		\| 4 \|\| (since core3.1.2) Propagate port {{PortNo\|$xxFF}} I/O cycles (hard reset = 0)

Ped7g: core 3.1.4 changes/refresh

2020-04-16T00:12:00Z

core 3.1.4 changes/refresh

← Older revision		Revision as of 01:12, 16 April 2020
Line 18:		Line 18:
	\| 1 \|\| Propagate port {{PortNo\|$7FFD}} I/O cycles (hard reset = 0)		\| 1 \|\| Propagate port {{PortNo\|$7FFD}} I/O cycles (hard reset = 0)
	\|-		\|-
	\| 0 \|\| Propagate port {{PortNo\|$**FE}} I/O cycles (hard reset = 0)		\| 0 \|\| Propagate port {{PortNo\|$**FE}} I/O cycles (hard reset = 1)
	\|}		\|}

			core3.1.4 change: bit 0 is now set to "1" upon hard reset

	If any of the bits are set, I/O cycles for the corresponding ports are propagated to the expansion bus when		If any of the bits are set, I/O cycles for the corresponding ports are propagated to the expansion bus when

Ped7g: core 3.1.3 changes/refresh

2020-03-30T09:22:31Z

core 3.1.3 changes/refresh

← Older revision		Revision as of 10:22, 30 March 2020
Line 8:		Line 8:
	! Bit !! Description		! Bit !! Description
	\|-		\|-
	\| 7-4 \|\| Reserved, must be 0		\| 7-5 \|\| Reserved, must be 0
			\|-
			\| 4 \|\| (since core3.1.2) Propagate port {{PortNo\|$xxFF}} I/O cycles (hard reset = 0)
	\|-		\|-
	\| 3 \|\| Propagate port {{PortNo\|$1FFD}} I/O cycles (hard reset = 0)		\| 3 \|\| Propagate port {{PortNo\|$1FFD}} I/O cycles (hard reset = 0)

Ped7g: core 3.0 changes/refresh

2019-11-12T10:42:30Z

core 3.0 changes/refresh

New page

{{NextRegister
|Number=$8A
|Readable=Yes
|Writable=Yes
|ShortDesc=Monitoring internal I/O or adding external keyboard
}}
{|class="wikitable"
! Bit !! Description
|-
| 7-4 || Reserved, must be 0
|-
| 3 || Propagate port {{PortNo|$1FFD}} I/O cycles (hard reset = 0)
|-
| 2 || Propagate port {{PortNo|$DFFD}} I/O cycles (hard reset = 0)
|-
| 1 || Propagate port {{PortNo|$7FFD}} I/O cycles (hard reset = 0)
|-
| 0 || Propagate port {{PortNo|$**FE}} I/O cycles (hard reset = 0)
|}

If any of the bits are set, I/O cycles for the corresponding ports are propagated to the expansion bus when
the expansion bus is on.

If the internal port decode is still active, any response sent by devices on the
expansion bus will be ignored.

The purpose here is to allow external peripherals to monitor changes in state inside the ZX Next.

{{PortNo|$**FE}} is treated specially so that external keyboards can be attached. When its propagate bit is set,
the value read from the bus will be mixed into keyboard reads on port $FE.

(note: Next registers with number higher than $7F are inaccessible from Copper code)