View source for Joystick I/O Mode Register

{{NextRegister
|Number=11
|Readable=Yes
|Writable=Yes
|ShortDesc=Joystick port I/O control
}}
  bit 7 = 1 to enable i/o mode (soft reset = 0)
  bit 6 = Reserved, must be 0
  bits 5:4 = I/O Mode (soft reset = 0)
    00 = bit bang
    01 = clock
    10 = uart on left joystick port
    11 = uart on right joystick port
  bits 3:1 = Reserved, must be 0
  bit 0 = Parameter (soft reset = 1)
    bit bang : copied to pin 7
    clock    : 0 = hold high when clock becomes high, 1 = run *
    uart     : 0 = redirect esp uart0 to joystick, 1 = redirect pi uart1 to joystick
               (Tx out on pin 7, Rx in from pin 9, CTS_n in from pin 6 **)

The state of output pin 7 is stored internally in a register and is retained across changing modes and while i/o mode is disabled.  While in i/o mode, keyboard joystick types (Sinclair, Cursor, etc) produce no readings but the current state of pins can still be read via the Kempston ports.  When leaving i/o mode, joystick operation resumes after ~64 scan lines have passed.

  * CTC channel 3 is currently used to drive pin 7 in clock mode.  Freq = Fctc3 / 2.
  ** CTS_n is only active if the seleced uart is in hw flow control mode.