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Xilinx-Artix-7 FPGA

2025-07-19T08:44:58Z

Timgilberts:

== FPGA Upgrade: Artix-7 vs Spartan-6 ==

The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.

The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices.

Below is a comparison between the two FPGAs:

{| class="wikitable"
! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4) !! Artix-7 XC7A35T-2 (KS3)
|-
| Technology Node || 45 nm || 28 nm || 28nm
|-
| Logic Cells || ~14,579 || ~16,640 || ~33,280
|-
| Flip-Flops || 18,224 || 20,800 || 41,600
|-
| Block RAM || 576 Kbits || 918 Kbits || 1,800
|-
| DSP Slices || 32 || 45 || 90
|-
| Power Consumption || Higher || Lower (static & dynamic) || Lower (static & dynamic)
|-
| Clock Management || PLL-based || MMCMs and PLLs (more flexible) || MMCMs and PLLs (more flexible)
|-
| Toolchain || Xilinx ISE (legacy) || Xilinx Vivado (modern) || Xilinx Vivado (modern)
|-
| Partial Reconfiguration || Not supported || Supported || Supported
|}

Although the two FPGA models require different bitstreams due to the differing FPGA architectures, all systems are designed to remain '''feature-identical wherever possible''' in the Next Core to avoid splitting the user base. The KS2 and KS3 larger FPGA's could provide alternate cores with extra features - e.g. the Official QL core has Sprites on a KS2 to create an enhanced QL.

The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:

* {{NextRegNo|$F0}} – XDEV CMD
* {{NextRegNo|$F8}} – XADC REG
* {{NextRegNo|$F9}} – XADC D0
* {{NextRegNo|$FA}} – XADC D1

These registers allow developers to interact with internal Xilinx features such as the DNA ID and XADC (analog-to-digital converter). Technical documentation for these registers can be found on their respective pages.

== External Links ==
* [https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf Xilinx Spartan-6 XC6SLX16 Data Sheet]
* [https://docs.amd.com/v/u/en-US/ds180_7Series_Overview Xilinx Artix-7 XC7A15T CSG324-1 Data Sheet]

Xilinx-Artix-7 FPGA

2025-07-19T08:42:41Z

Timgilberts:

== FPGA Upgrade: Artix-7 vs Spartan-6 ==

The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.

The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices.

Below is a comparison between the two FPGAs:

{| class="wikitable"
! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4) !! Artix-7 XC7A35T-2 (KS3)
|-
| Technology Node || 45 nm || 28 nm || 28nm
|-
| Logic Cells || ~14,579 || ~16,640 || ~33,280
|-
| Flip-Flops || 18,224 || 20,800 || 41,600
|-
| Block RAM || 576 Kbits || 918 Kbits || 1,800
|-
| DSP Slices || 32 || 45 || 90
|-
| Power Consumption || Higher || Lower (static & dynamic) || Lower (static & dynamic)
|-
| Clock Management || PLL-based || MMCMs and PLLs (more flexible) || MMCMs and PLLs (more flexible)
|-
| Toolchain || Xilinx ISE (legacy) || Xilinx Vivado (modern) || Xilinx Vivado (modern)
|-
| Partial Reconfiguration || Not supported || Supported || Supported
|}

Although the two models require different bitstreams due to the differing FPGA architectures, both systems are designed to remain '''feature-identical wherever possible''' to avoid splitting the user base.

The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:

* {{NextRegNo|$F0}} – XDEV CMD
* {{NextRegNo|$F8}} – XADC REG
* {{NextRegNo|$F9}} – XADC D0
* {{NextRegNo|$FA}} – XADC D1

These registers allow developers to interact with internal Xilinx features such as the DNA ID and XADC (analog-to-digital converter). Technical documentation for these registers can be found on their respective pages.

== External Links ==
* [https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf Xilinx Spartan-6 XC6SLX16 Data Sheet]
* [https://docs.amd.com/v/u/en-US/ds180_7Series_Overview Xilinx Artix-7 XC7A15T CSG324-1 Data Sheet]

Xilinx-Artix-7 FPGA

2025-07-19T08:42:11Z

Timgilberts:

== FPGA Upgrade: Artix-7 vs Spartan-6 ==

The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.

The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices.

Below is a comparison between the two FPGAs:

{| class="wikitable"
! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4) !! Artix-7 XC7A35T-2
|-
| Technology Node || 45 nm || 28 nm || 28nm
|-
| Logic Cells || ~14,579 || ~16,640 || ~33,280
|-
| Flip-Flops || 18,224 || 20,800 || 41,600
|-
| Block RAM || 576 Kbits || 918 Kbits || 1,800
|-
| DSP Slices || 32 || 45 || 90
|-
| Power Consumption || Higher || Lower (static & dynamic) || Lower (static & dynamic)
|-
| Clock Management || PLL-based || MMCMs and PLLs (more flexible) || MMCMs and PLLs (more flexible)
|-
| Toolchain || Xilinx ISE (legacy) || Xilinx Vivado (modern) || Xilinx Vivado (modern)
|-
| Partial Reconfiguration || Not supported || Supported || Supported
|}

Although the two models require different bitstreams due to the differing FPGA architectures, both systems are designed to remain '''feature-identical wherever possible''' to avoid splitting the user base.

The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:

* {{NextRegNo|$F0}} – XDEV CMD
* {{NextRegNo|$F8}} – XADC REG
* {{NextRegNo|$F9}} – XADC D0
* {{NextRegNo|$FA}} – XADC D1

These registers allow developers to interact with internal Xilinx features such as the DNA ID and XADC (analog-to-digital converter). Technical documentation for these registers can be found on their respective pages.

== External Links ==
* [https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf Xilinx Spartan-6 XC6SLX16 Data Sheet]
* [https://docs.amd.com/v/u/en-US/ds180_7Series_Overview Xilinx Artix-7 XC7A15T CSG324-1 Data Sheet]

Xilinx-Artix-7 FPGA

2025-07-19T08:20:48Z

Timgilberts:

== FPGA Upgrade: Artix-7 vs Spartan-6 ==

The ZX Spectrum Next Kickstarter model KS2 (Issue 4 board) uses the '''Xilinx Artix-7 XC7A15T FPGA''', replacing the '''Xilinx Spartan-6 XC6SLX16 FPGA''' used in the original KS1 (Issue 2B board). The Artix-7 is a more modern device, offering better performance, lower power consumption, and access to newer development tools.

The KS3 will use an Artix-7 XC7A35T-2 which pretty much doubles the logic cells, block RAM and DSP slices. This page will be updated with more details

Below is a comparison between the two FPGAs:

{| class="wikitable"
! Feature !! Spartan-6 XC6SLX16 (KS1 - Issue 2B) !! Artix-7 XC7A15T (KS2 - Issue 4)
|-
| Technology Node || 45 nm || 28 nm
|-
| Logic Cells || ~14,579 || ~16,640
|-
| Flip-Flops || 18,224 || 20,800
|-
| Block RAM || 576 Kbits || 918 Kbits
|-
| DSP Slices || 32 || 45
|-
| Power Consumption || Higher || Lower (static & dynamic)
|-
| Clock Management || PLL-based || MMCMs and PLLs (more flexible)
|-
| Toolchain || Xilinx ISE (legacy) || Xilinx Vivado (modern)
|-
| Partial Reconfiguration || Not supported || Supported
|}

Although the two models require different bitstreams due to the differing FPGA architectures, both systems are designed to remain '''feature-identical wherever possible''' to avoid splitting the user base.

The only additions exclusive to KS2 (Issue 4) are four extra {{Category:Next_Configuration_Registers}} used for low-level hardware access:

* {{NextRegNo|$F0}} – XDEV CMD
* {{NextRegNo|$F8}} – XADC REG
* {{NextRegNo|$F9}} – XADC D0
* {{NextRegNo|$FA}} – XADC D1

These registers allow developers to interact with internal Xilinx features such as the DNA ID and XADC (analog-to-digital converter). Technical documentation for these registers can be found on their respective pages.

== External Links ==
* [https://www.xilinx.com/support/documentation/data_sheets/ds160.pdf Xilinx Spartan-6 XC6SLX16 Data Sheet]
* [https://docs.amd.com/v/u/en-US/ds180_7Series_Overview Xilinx Artix-7 XC7A15T CSG324-1 Data Sheet]

GPIO Socket (J15)

2020-03-04T21:36:37Z

Timgilberts:

The GPIO socket, marked J15 on the circuit board, allows access to several different power and data lines:

* I2C serial protocol
* UART
* Spare pins on the [[FPGA]]
* 5v, 3.3v and GND

The UART is also used for the [[ESP8266-01|ESP Wi-fi module]], and can't be used from the GPIO without removing the ESP module. I2C is also used to communicate with the [[RTC|real time clock]] module.

The GPIO is not populated and requires a socket to be installed (2 x 10 IDC 2.54mm spc. Male Pin Header). Pull up/down resistors may be required for some pins to limit current.

[[Image:NEXT GPIO location.jpg|thumb|J15 position on circuit board]]
[[Image:NEXT_GPIO.png|thumb|GPIO pinout image]]

In June 2019 it was announced that pins 4 and 17 of J15 would be used for two additional keyboard connections on full cased Nexts. This is factory fitted on 2B boards with a two slot connector for the additional two lines on a third membrane tail. The extra data is handled by the VHDL in the FPGA so it still appears as a standard 48K Membrane but, without the complexity of three layers needed.

This change does mean it is slightly harder to use J15 as the socket overlaps some ajoining holes slightly.

RTC

2020-02-28T19:55:40Z

Timgilberts:

A Real Time Clock (RTC) and Wi-Fi module were optional additions to the full cased Spectrum Next at the time of the original Kickstarter. They can be added to development boards and units that don't already have them, although the RTC requires soldering components to the board (whilst the Wi-Fi module is push-fit).

== Hardware Requirements ==

Adding a RTC requires the following components:

* 12pF Crystal
* DS1307 IC
* 8 pin DIL Socket
* CR2032 Holder
* CR2032 Battery

(6pF Crystals have been reported to work)

This is the mounting position on the PCB:

{| width=100%
|valign=top width=50%| [[Image:RTC_Port_Location.jpg]]
|valign=top| [[Image:RTC_Port.png]]
|}

== Software Support ==

The [https://www.specnext.com/latestdistro/ TBBlue SD Distribution] contains dot commands "DATE" and "TIME" for working with the RTC:

{|
|-
| .DATE "31/12/2017" || Set the date to new years eve
|-
| .DATE || Print the current date
|-
| .TIME "00:30:00:" || Set the time to 30 minutes after midnight
|-
| .TIME || Print the current time
|-
| .TIME -h || Print help message
|}

You can also set the time with the .NXTP command if you have WIFI setup and configured.

If you use these without a RTC soldered to the board they will just give an error that no signature is found or No ACK received. You can however use the option TIME -d to get the contents of the chip which will be junk if the RTC is not fitted but, but may help to diagnose any problems getting it working.

When the RTC is fitted, as long as it has been set the date and time automatically appear in the NextZXOS menus. The ".ls" command will print a file listing with dates, and "cat exp" will show times as well.

You can get the contents of a dot command into a string using this NextBASIC:

DIM a$(100):OPEN #2,"v>a$":.TIME:CLOSE #2:PRINT a$

You can effectively "touch" a file in BASIC to update its timestamp with:

OPEN #4,"u>filename":CLOSE #4

The RTC is connected to the I2C bus. Also supplied is a DOT command called I2CSCAN - this will search the I2C bus for any devices found which can help in seeing what is connected. You should see at least one device at 0x68 if the RTC chip is connected. If you see others then they are likely parts of the HDMI connection or maybe you have something connected on J15.

Further information, including ESXDOS support, can be found on the TBBlue Distribution in the file \docs\extra-hw\rtc\RTCI2CTIMEDATEreadme.txt

RTC

2020-02-28T19:53:12Z

Timgilberts:

A Real Time Clock (RTC) and Wi-Fi module were optional additions to the full cased Spectrum Next at the time of the original Kickstarter. They can be added to development boards and units that don't already have them, although the RTC requires soldering components to the board (whilst the Wi-Fi module is push-fit).

== Hardware Requirements ==

Adding a RTC requires the following components:

* 12pF Crystal
* DS1307 IC
* 8 pin DIL Socket
* CR2032 Holder
* CR2032 Battery

(6pF Crystals have been reported to work)

This is the mounting position on the PCB:

{| width=100%
|valign=top width=50%| [[Image:RTC_Port_Location.jpg]]
|valign=top| [[Image:RTC_Port.png]]
|}

== Software Support ==

The [https://www.specnext.com/latestdistro/ TBBlue SD Distribution] contains dot commands "DATE" and "TIME" for working with the RTC:

{|
|-
| .DATE "31/12/2017" || Set the date to new years eve
|-
| .DATE || Print the current date
|-
| .TIME "00:30:00:" || Set the time to 30 minutes after midnight
|-
| .TIME || Print the current time
|-
| .TIME -h || Print help message
|}

You can also set the time with the .NXTP command if you have WIFI setup and configured.

If you use these without a RTC soldered to the board they will just give an error that no signature is found or No ACK received. You can however use the option TIME -d to get the contents of the chip which will be junk if the RTC is not fitted but, but may help to diagnose any problems getting it working.

When the RTC is fitted, as long as it has been set the date and time automatically appear in the NextZXOS menus. The ".ls" command will print a file listing with dates, and "cat exp" will show times as well.

You can get the contents of a dot command into a string using this NextBASIC:

DIM a$(100):OPEN #2,"v>a$":.TIME:CLOSE #2:PRINT a$

You can effectively "touch" a file in BASIC to update its timestamp with:

OPEN #4,"u>filename":CLOSE #4

The RTC is connected to the I2C bus. Also supplied is a DOT command called I2CSCAN - this will search the I2C bus for any devices found which can help in seeing what is connected. You should see at least one device at 0x68 if the RTC chip is connected. If you see others when you have nothing on J15 then make sure you have the latest TBU, any capacitor mod etc - if so and you still have others detected then please contribute to the RTC posts on Facebook or the [https://www.specnext.com/forum Forum].

Further information, including ESXDOS support, can be found on the TBBlue Distribution in the file \docs\extra-hw\rtc\RTCI2CTIMEDATEreadme.txt