XADC Register
From SpecNext Wiki
| Number | TBRegisterNumber::$F8 |
|---|---|
| Readable | TBRegisterReadable::Yes |
| Writable | TBRegisterWritable::Yes |
| Short Description | ShortDesc::Issue 4 only |
bit 7 = 1 to write to XADC DRP port, 0 to read from XADC DRP port ** bits 6:0 = XADC DRP register address DADDR
- An XADC register read or write is initiated by writing to this register
- There must be at least six 28 MHz cycles after each r/w to this register
- ** Reads as 0