Expansion Bus Decoding b0-7 Register
From SpecNext official Wiki
| Number | $86 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | When expansion bus is enabled: Internal ports decoding mask |
| Bit | Description |
|---|---|
| 7 | Masking decoding: Kempston Joystick 2, Joystick I/O ($xx37 / 55) (also MD2 controller) |
| 6 | Masking decoding: Kempston Joystick ($xx1F / 31) (also MD1 controller) |
| 5 | Masking decoding: Datagear DMA Port ($xx6B / 107) |
| 4 | Masking decoding: +3 floating bus |
| 3 | Masking decoding: Plus 3 Memory Paging Control ($1FFD / 8189) |
| 2 | Masking decoding: Next Memory Bank Select ($DFFD / 57341) |
| 1 | Masking decoding: Memory Paging Control ($7FFD / 32765) |
| 0 | Masking decoding: Timex Sinclair Video Mode Control ($xxFF / 255) |
since core3.1.1: all bits are set to 1 when: soft reset and bit 31 is clear OR hard reset and bit 31 is set (otherwise content is kept intact). All bits are set to 1 upon hard reset.
When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.
If the expansion bus is on, this allows I/O cycles for disabled internal ports to propagate to the expansion bus, otherwise corresponding I/O cycles to the expansion bus are filtered.
(note: Next registers with number higher than $7F are inaccessible from Copper code)